The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 01, 2002
Filed:
Feb. 22, 2002
Tae-heon Kim, Suwon, KR;
Abstract
A method of forming contact plugs of a semiconductor device is provided. Bit lines are formed over a semiconductor substrate in which a predetermined lower layer is formed and a cell area and a core area are defined. An interlayer dielectric layer is formed over the semiconductor substrate over which the bit lines are formed. The interlayer dielectric layer is wet etched until the interlayer dielectric layer is recessed from the upper surfaces of the bit lines to a predetermined depth. A dielectric layer for forming spacers is formed over the semiconductor substrate, the dielectric layer having a step difference formed due to the wet etching of the interlayer dielectric layer. The dielectric layer in the core area is left and the dielectric layer in the cell area is etched by an anisotropic method to form spacers of the dielectric layer in the cell area. The interlayer dielectric layer is etched using the spacers and the dielectric layer as a mask to form contact holes. A conductive layer is deposited over the semiconductor substrate where the contact holes are formed to fill the contact holes.