The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 24, 2002
Filed:
Apr. 07, 2000
Richard Bériault, Hull, CA;
Philsar Semiconductor Inc., Nepean, CA;
Abstract
The invention provides ESD protection for IC's while isolating the different power supplies from one another. A network in the IC has a plurality of circuit cells through which the IC receives power. Each circuit cell provides localized electrostatic discharge protection. With each circuit cell coupled to a global node through a dual current direction coupling network and with portions of the global node physically separating the circuit cells, any noise, interference, or stray ESD current generated by a circuit cell is shunted away from other circuit cells to the global node. An off-chip ground connection coupled to the global node provides a destination for this noise or interference.