The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 24, 2002
Filed:
Aug. 06, 1999
Raymond G. Greene, Ovid, NY (US);
Donald P. Seraphim, Vestal, NY (US);
Dean W. Skinner, Vestal, NY (US);
Boris Yost, Ithaca, NY (US);
Kohichi Miwa, Yokohama, JP;
Michikazu Noguchi, Sagamihara, JP;
Shunji Suzuki, Yokohama, JP;
Rainbow Displays, Inc., Endicott, NY (US);
Abstract
The present invention features designs of pixels and designs of control features for seals on AMLCD tiles optimized for tiling AMLCD flat panel displays (FPDs) which have visually imperceptible seams. The FPD structure has an image view plane which is continuous and remote from the pixel apertures or image source plane on the inside of the tiles. The image is formed on the view plane by a distributed ultra low magnification flies-eye optical system (a screen) that is integrated with the tiles, effectively excluding and obscuring an image of the seams. The innovations described herein minimize the defects on the perimeter pixels by effectively damming the waviness of the front of the seal near the perimeter pixels on the tiles. Dark space required for the seal between the interior tile edges and active regions of the pixels is decreased, as is the space allocated for wiring thereby increasing the feasible aperture ratios near the mosaic edges and all apertures. The tile designs make effective use of the area of an entire manufacturing panel.