The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 17, 2002

Filed:

Dec. 13, 1993
Applicant:
Inventors:

Scott Sarnikowski, Santa Clara, CA (US);

Unmesh Agarwala, San Jose, CA (US);

Stanley S. Quan, San Jose, CA (US);

Charles E. Comstock, San Jose, CA (US);

Frank G. Moore, Oakhurst, CA (US);

Assignee:

Compaq Computer Corporation, Houston, TX (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/500 ;
U.S. Cl.
CPC ...
G06F 1/500 ;
Abstract

In a data processing system of the type having multiple processor units coupled to one another by a bus means for interprocessor communications there is provided a fiber optic interconnection system to interconnect the bus means of multiple processor sections to one another, thereby allowing groups of the processor units to be physically spaced from one another. The fiber optic interconnect system includes, for each multiprocessor unit section functions to receive messages communicated on the interprocessor bus of that section for receipt by a destination processor of the other section, format the message for fiber optic transmission, and transmit the message; and circuitry for receiving messages on the fiber optic link, scheduling the message for transmission to the destination processor, and maintaining that scheduling in the face of receipt of another message for the same processor unit. The fiber optic interconnect system includes means for configuring the system to identify which processor units are in which section and, when more than two sections are interconnected by the fiber optic link, provide information as to the shortest route to the destination processor from a section.


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