The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 17, 2002
Filed:
Oct. 25, 2001
Hisashi Iwamoto, Hyogo, JP;
Mitsubishi Denki Kabushiki Kaisha, Tokyo, JP;
Abstract
A clock buffer includes: a comparator circuit comparing complementary clock signals CLK and /CLK with each other to output an internal clock signal used in a normal operation; a comparator circuit comparing a reference potential Vref and clock signal CLK with each other; and a comparator circuit comparing reference potential Vref and clock signal /CLK with each other. A phase comparator circuit compares the complementary clock signals with each other in respect to phase. An input/output buffer outputs an output of the phase comparator circuit to a data output terminal in a test mode. Therefore, there can be realized a test mode for performing efficient calibration of a measuring apparatus.