Pixel component packing, unpacking, and modification

Abstract

A computer system and an associated graphics adapter that includes one or more processors connected to a host bus. A system memory is accessible from the host bus via a memory controller and an I/O bridge is coupled between the host bus and an I/O bus. The computer system further includes a frame buffer suitable for storing a representation of a graphic image and the graphics adapter connected to the I/O bus. The graphics adapter includes means for receiving host pixel data that is formatted, according to a host format defining the ordering and width of a set host components, as a set of host component values. The adapter also has means for transforming the host pixel data into frame buffer pixel data where the frame buffer pixel data is formatted, according to a frame buffer format defining the ordering and width of a set of frame buffer components, as a set of frame buffer component values. In the preferred embodiment, the value of each host pixel data component is replicated in a corresponding component of the frame buffer pixel data by repeating the bits comprising the value in the corresponding frame buffer component until the frame buffer component is full. In the preferred embodiment, the transforming means includes a programmable set of host format definition registers that define the host format. These registers preferably include a start bit register and a width register for each component of the data. The component data widths are permitted to vary from one another in the preferred embodiment such that a first component of the host pixel data could have one width an a second component could have another (different) width. The adapter preferably further includes means for scaling and biasing the frame buffer pixel data and means for transforming (packing) frame buffer pixel data into host pixel data.