The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 17, 2002

Filed:

Jun. 28, 2001
Applicant:
Inventors:

Balaraman Mani, Cupertino, CA (US);

Bill Chen, Saratoga, CA (US);

Che-Hoo Ng, San Martin, CA (US);

Assignee:

Advanced Micro Devices, Inc., Sunnyvale, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01J 3/720 ;
U.S. Cl.
CPC ...
H01J 3/720 ;
Abstract

Contamination of semiconductor wafers are minimized during implantation processes within an implantation system. An implantation chamber of the implantation system and components within the implantation chamber are coated with additional material to minimize contaminants within the implantation chamber. For example, surfaces of the implantation chamber and/or the components of the implantation chamber are coated by performing an implantation process with a coating dopant before a semiconductor wafer is placed within the implantation chamber. In this manner, contaminants on the surfaces of the implantation chamber and/or the components within the implantation chamber are substantially coated and encapsulated with the coating dopant to prevent contact of the contaminant with the semiconductor wafer placed within the implantation chamber. Alternatively, shields are placed on surfaces of the implantation chamber and/or on surfaces of the components of the implantation chamber during an implantation process for a first semiconductor wafer having a contaminant source. Such shields are amenable for absorbing the contaminant and are removed after this implantation process and before a second semiconductor wafer is placed within the implantation chamber to minimize contamination of the second semiconductor wafer.


Find Patent Forward Citations

Loading…