The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 10, 2002
Filed:
Feb. 28, 2000
Mark G. Whitney, Danville, CA (US);
Sridhar Subramanian, Sunnyvale, CA (US);
Advanced Micro Devices, Inc., Sunnyvale, CA (US);
Abstract
A computer aided design system and method for placing repeater buffers on a floor plan of an integrated circuit chip. The system includes a repeater placement tool that provides a near optimal placement of repeaters on the floor plan of a chip. The tool utilizes chip design netlist data indicating need for optimization to further decrease propagation delays in the design, wherein the data is manipulated by an algorithm which uses a combination of software programs that generate an approximate geometric placement of repeaters, that iteratively and heuristically improves the basic geometric layout, and that assigns, rule-based repeater type to each repeater, optimally determined to ensure that the strength, load, and other characteristics of the repeater buffers are correct, given the repeater location and the topology and loads of the nets.