The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 10, 2002

Filed:

Jul. 12, 1999
Applicant:
Inventor:

Toshinori Hosokawa, Osaka, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G01R 3/13183 ;
U.S. Cl.
CPC ...
G01R 3/13183 ;
Abstract

Test sequences for use in fault testing for an integrated circuit are efficiently generated. The integrated circuit is subjected to timeframe expansion, thereby generating a time expansion model including a combinational circuit. With respect to this time expansion model, a compaction template is generated by compacting one or more primitive templates indicating whether or not a primary input or a pseudo primary input is present in each time. Test patterns are generated with respect to the time expansion model, and the generated test patterns are transformed, with compaction accompanied, into test sequences. The compaction is conducted by substituting the respective test patterns in the compaction template and connecting the resultant compaction templates. In this manner, short test sequences can be efficiently generated without spending much time on the compaction.


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