The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 10, 2002

Filed:

Jun. 11, 1998
Applicant:
Inventor:

Tommaso Bacigalupo, San Jose, CA (US);

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K 1/9094 ; H03K 1/90175 ;
U.S. Cl.
CPC ...
H03K 1/9094 ; H03K 1/90175 ;
Abstract

A circuit and a method for setting a digital potential at an integrated circuit output pin in which pull up/pull down circuitry holds a defined value at the output pin during the power down of the integrated circuit. A primary driver responsive to a state of the integrated circuit sets the output pin while the integrated circuit is in an active mode of operation, and secondary driver sets the output pin while the integrated circuit is in an inactive mode of operation. Control logic is provided as being responsive to a change in the mode of operation of the integrated circuit from its active mode to its inactive mode for generating a control signal relative to the state of the integrated circuit. The secondary driver logic is responsive to the control signal generated by the control logic and the state of the integrated circuit upon the change in the mode of operation of the integrated circuit from a powered up mode to a powered down mode for driving the output pin while the integrated circuit is in its inactive mode of operation.


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