The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 10, 2002

Filed:

Feb. 23, 2001
Applicant:
Inventors:

Chong Man Yun, Seoul, KR;

Soo-seong Kim, Seoul, KR;

Young-dae Kwon, Incheon, KR;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 2/974 ;
U.S. Cl.
CPC ...
H01L 2/974 ;
Abstract

An insulated gate bipolar transistor having a high breakdown voltage in a reverse blocking mode and a method for fabricating the same are provided. The insulated gate bipolar transistor includes a relatively low-concentration lower buffer layer and a relatively high-concentration upper buffer layer. The low-concentration lower buffer layer contacts a semiconductor substrate having a high concentration of first conductivity type impurities used as a collector region, and the high-concentration upper buffer layer contacts a drift region of a second conductivity type. The conductivity type of the upper buffer layer is second conductivity type impurities, and the conductivity type of the lower buffer layer is substantially intrinsic, or first conductivity type impurities, or second conductivity type impurities. According to the present invention, due to the high-concentration upper buffer layer, the thickness of the drift region can be reduced, and during a forward continuity, a switching speed can be improved. Simultaneously, due the low-concentration lower buffer layer, the breakdown voltage of a device can be increased in a reverse blocking mode.


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