The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 03, 2002
Filed:
Feb. 12, 1999
Hong Jiang, Montclair, NJ (US);
Paul L. Palmieri, New Providence, NJ (US);
Agesino Primatic, Jr., Frenchtown, NJ (US);
Lesley J. Wu, Parsippany, NJ (US);
Liangkai Yu, New Providence, NJ (US);
Agere Systems Guardian Corp., Miami Lakes, FL (US);
Abstract
A phase tracker receives a signal component x and forms a phase- and gain-corrected signal z . In particular, the phase tracker performs a Hilbert transform of x to produce a quadrature phase component y to form the constellation defined by (x , y ). Consequently, phase rotation and gain adjustment are combined into a linear transform of the constellation defined by (x , y ). The linear transform z =&agr;x +&bgr;y employs two coefficients &agr; and &bgr;. The coefficients &agr; and &bgr; of the linear transform are derived so as to provide an optimal solution according to minimum mean square error. Approximations to the coefficients &agr; and &bgr; of the linear transform may be iteratively determined with a stochastic gradient method. Advantages of employing the phase- and gain-corrected signal z as an I-phase detection result of a demodulator include 1) the phase rotation and gain adjustment are combined into one operation, and 2) the a sine/cosine lookup table is not employed. Including both phase rotation and a gain adjustment may provide for better performance of the demodulator. In addition, these advantages may result in reduced circuit complexity and reduced added error.