The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 03, 2002

Filed:

Jul. 12, 2001
Applicant:
Inventor:

Frank den Breejen, Austin, TX (US);

Assignee:

Cirrus Logic, Inc., Austin, TX (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03M 1/06 ; H03M 1/10 ;
U.S. Cl.
CPC ...
H03M 1/06 ; H03M 1/10 ;
Abstract

Measurement data collected by isolated ADCs in multiple channels may be related. In such a scenario, data may be transmitted to a microcontroller or programmable logic device for centralized processing. Gain and offset of the ADCs in different channels, particularly their drift relative to one another, is an issue which requires attention. In particular, a pair of precision resistors is provided to calibrate the different channels. The ADCs may be factory calibrated and the ratio between the two precision resistors stored within the ADCs. The ADCs may later self-calibrate by comparing their relative gains to the stored resistor ratio. Gain of one of the ADCs may be adjusted relative to the other in order to maintain a relative gain calibration. Although absolute gain is not calibrated (as the resistors are isolated) for particular applications, only relative gain between the ADCs is relevant.


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