The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 03, 2002
Filed:
Jan. 30, 2001
Satomi Horita, Tokyo, JP;
NEC Corporation, Tokyo, JP;
Abstract
Flip-flop circuits FF to FF are each constructed as a pair of cascade connected latch circuits and in an arbitrarily combination. The latch circuits L and L each comprises an input stage push-pull circuit PP and an output stage hold circuit HD as CVSL circuit. The latch circuit L includes an input stage having two pairs of nMOSTs to receiving input data DP and DN inputted thereto and connected in series each and in parallel connection of the pairs and a pair of nMOSTs to receiving a clock CP inputted thereto and connected to the opposite sides of the parallel connection. The output stage hold circuit HD includes a CVSI circuit having two pairs of nMOSTs and and a pair of pMOSTs and and an nMOST receiving a clock CN inputted thereto. Thus obtained flip-flop (FF) circuit permits construction of a high density semiconductor integrated circuit (IC) with fast operation and low power consumption.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile