The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 03, 2002

Filed:

Jan. 21, 2000
Applicant:
Inventors:

Hideyo Haruhana, Tokyo, JP;

Hiroyuki Amishiro, Tokyo, JP;

Akihiko Harada, Tokyo, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 2/348 ; H01L 2/352 ; H01L 2/940 ;
U.S. Cl.
CPC ...
H01L 2/348 ; H01L 2/352 ; H01L 2/940 ;
Abstract

A semiconductor device, having a multi-layer interconnection structure, is provided which comprises a semiconductor substrate and a plurality of interlayer insulating films formed on the semiconductor substrate. A plurality of conductive leads are formed in the interlayer insulating films. In one of the interlayer insulting films having conductive lead or leads, at least one conductive plug is formed vertically to connect the conductive leads in different interlayer insulating films. Further, adjacent conductive leads may be formed in an adjacent interlayer insulating films are connected together to form a unified conductive lead.


Find Patent Forward Citations

Haruhana, Hideyo. (2002). Semiconductor device having an improved multi-layer interconnection structure and manufacturing method thereof (U.S. Patent No. 6445071). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6445071

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Loading…