The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 27, 2002

Filed:

Jul. 15, 1998
Applicant:
Inventors:

Joseph Aboukhalil, Franklin Park, NJ (US);

Boris Aleiner, Somerset, NJ (US);

Boris Bark, Ocean Township, NJ (US);

Assignee:

Avaya Technology Corp, Miami Lakes, FL (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03C 1/62 ; H04B 1/700 ; H04B 1/38 ; H03M 1/36 ;
U.S. Cl.
CPC ...
H03C 1/62 ; H04B 1/700 ; H04B 1/38 ; H03M 1/36 ;
Abstract

A power level determination device provides an output voltage usable as a specific reference power level corresponding to each RF input power level. The device includes a peak detector, which detects a pulse-type signal at its input and provides a non-pulse-type signal at its output. N comparators are provided, where N is an integer. Each of the N comparators has an output, a first input coupled to the output of the peak detector, and a second input coupled to a respectively different threshold voltage. The first one of the N comparators has a maximum threshold voltage. The threshold voltages decrease monotonically from No. 1 to No. N. N exclusive-OR components are provided. A first one of the N exclusive-OR components is coupled to ground and to the output of a first one of the N comparators. Each of the remaining N−1 exclusive-OR components is coupled to the outputs of a respectively different pair of the N comparators, so that at any given time, a single one of the N exclusive-OR components has an output signal of a logic level that is different from the logic level of the outputs of the remaining N−1 exclusive-OR components. N resistive divider circuits are coupled to respective ones of the N exclusive-OR components. Each of the N resistive divider circuits provides a respectively different predetermined output voltage as an indication of a power level of the pulse-type signal, if the exclusive-OR component to which that circuit is coupled is the single one of the N exclusive-OR components.


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