Controlling reading from and writing to a semiconductor memory device

Abstract

The inventions herein feature an arrangement for controlling read and write operations in a semiconductor memory device, which can reduce power consumption by controlling data read and write operations in a DRAM having an open drain output buffer. The circuit for controlling the read and write operations in the semiconductor memory device includes a write unit for comparing potential states of bits of a write data according to a control signal, converting the write data into a first logic level and writing the converted data on DRAMs as an internal data with a flag bit having a first logic level, when a number of the bits having the first logic level is greater than a number of the bits having a second logic level, and writing the write data on the DRAMs as an internal data with a flag bit having the second logic level, when the number of the bits having the first logic level is equal to or smaller than the number of the bits having the second logic level. A read unit reads a read data read from the DRAMs, or converts the read data and reads the converted data according to the potential state of the flag bit.