The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 27, 2002
Filed:
Dec. 23, 2000
Junichi Yamada, Tokyo, JP;
Hideki Sato, Tokyo, JP;
Kunihiro Tsubosaki, Tokyo, JP;
Yo Shimazaki, Tokyo, JP;
Dainippon Printing Co., Ltd., Tokyo, JP;
Abstract
A member for mounting of semiconductor is comprised of a substrate, a concave portions for electrode and a concave portion for wire formed on one surface of the substrate, electrode terminals formed in the concave portions for electrode, and a wire formed in the concave portion for wire, in which the concave portions for electrode terminals are formed deeper than the concave portions for wire. In the pattern-forming process, resist pattern having an opening for wire and openings for electrode in which a width of the openings for electrode is larger than a width of the portion for wire is formed on one surface of a substrate. In the etching process, a substrate is half-cut by etching a substrate through the resist pattern as a mask so that concave portions for electrode and a opening for wire are formed on the surface of the substrate. In the plating process, the substrate is plated through the same resist pattern as a mask to form electrode terminals in the concave portions for electrode and a wire in the concave portion for wire. In the peeling process, the resist pattern is removed off from the substrate, so that a member for mounting of semiconductor can be obtained.