The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 27, 2002

Filed:

Sep. 03, 1996
Applicant:
Inventors:

Chen-Chi P. Chang, Newport Beach, CA (US);

James S. Cable, San Clemente, CA (US);

Assignee:

Hughes Electronics, Los Angeles, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 2/1339 ;
U.S. Cl.
CPC ...
H01L 2/1339 ;
Abstract

A silicon-based radiation-hard cryo-CMOS CCD process suitable for fabrication of devices ( ) with sub-micron feature sizes. A re-oxidized nitride/oxide (RONO) layer ( ) is preserved in the CCD area ( ) while plasma etching is used to define polysilicon 1 gates ( ) in the active FET area of the device. Thereafter, a wet chemical etching process, which does not destroy the integrity of the RONO layer ( ) in the CCD area, is carried out. A channel stop ( ) is formed after the field oxidation step in the active FET area to reduce the space required for minimum diode breakdown voltage between the n source/drain region and the p channel stop.


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