The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 20, 2002

Filed:

Sep. 19, 2000
Applicant:
Inventor:

Bernardo Elayda, San Jose, CA (US);

Assignee:

Xilinx, Inc., San Jose, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 1/750 ; G06F 9/45 ; G06F 9/445 ; G06F 9/24 ;
U.S. Cl.
CPC ...
G06F 1/750 ; G06F 9/45 ; G06F 9/445 ; G06F 9/24 ;
Abstract

System and method for configuring a programmable logic device (PLD) using an automatically generated configuration control file. A control file contains directives for configuring a PLD with a configuration bitstream, wherein the directives are in a selected language. A configuration control file generator is programmed to automatically create the control file with the directives in the selected language. In another embodiment, the particular directives and sequence of the directives that are generated are dependent on a selected configuration mode for the PLD. In performing the directives, configuration control signals are applied to the PLD, and the configuration bitstream is provided to the PLD.


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