The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 20, 2002
Filed:
Oct. 28, 1999
Michio Shimada, Tokyo, JP;
Sachio Nakaigawa, Tokyo, JP;
NEC Corporation, Tokyo, JP;
Abstract
An adder circuit can perform of two integers respective consisted of n=k m bits at high speed with a smaller scale circuit than that of an adder circuit employing a carry look ahead circuit. The adder circuit includes m in number of k-bit adding circuits connected in serial connection in such a manner that an carry output in a preceding digit is supplied to a carry input in a following digit, m in number of carry propagation alarm circuits provided corresponding to respective of m in number of k-bit adding means, for outputting carry propagation alarm signal only when carry input of corresponding adding means is propagated to a carry output, and OR circuit for performing OR for performing OR operation of the m in number of carry propagation alarm signals for generating a carry alarm signal, for leading a fixed result of addition from a final digit of the adding means in serial connection after extinction of generation of the carry alarm signal.