The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 20, 2002
Filed:
Aug. 28, 2000
Takashi Tatsumi, Tokyo, JP;
Mitsubishi Denki Kabushiki Kaisha, Tokyo, JP;
Abstract
An integrated semiconductor device with a wafer-level burn-in circuit includes a test mode register and an access controller. The integrated semiconductor device is set at a voltage force mode by placing the test mode register at a test mode, and is forcedly supplied with prescribed voltages. The wafer-level burn-in is carried out by setting an access controller at a WLBI (wafer-level burn-in) mode with maintaining the test mode. After completing the wafer-level burn-in operation, the WLBI mode is released. Then, an external tester reads test data from a memory core in the test mode, and compares the test data with expected values. The integrated semiconductor device with a wafer-level burn-in circuit can solve a problem of a conventional integrated semiconductor device with a wafer-level burn-in circuit in that it cannot verify the function of the wafer-level burn-in circuit properly.