The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 20, 2002

Filed:

Mar. 24, 2000
Applicant:
Inventor:

Andrew C. Ross, Ramona, CA (US);

Assignee:

Other;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 2/348 ; H01L 2/352 ;
U.S. Cl.
CPC ...
H01L 2/348 ; H01L 2/352 ;
Abstract

A stackable integrated circuit chip package comprising an interconnect sub-assembly which includes an interconnect substrate having first, second and third conductive pad arrays disposed thereon. The interconnect sub-assembly also includes a first rail member which is attached to the interconnect substrate and has a fourth conductive pad array disposed thereon, and a second rail member which is also attached to the interconnect substrate and has a fifth conductive pad array disposed thereon. The fourth and fifth conductive pad arrays are electrically connected to respective ones of the second and third conductive pad arrays of the interconnect substrate. In addition to the interconnect sub-assembly, the chip package of the present invention includes an integrated circuit chip which is electrically connected to the first conductive pad array of the interconnect substrate of the interconnect sub-assembly.


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