The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 13, 2002
Filed:
May. 07, 1999
Wayne Alan Downer, Portland, OR (US);
D. Scott Guthridge, Portland, OR (US);
Gerrit Huizenga, III, Portland, OR (US);
Chandrasekhar Pulamarasetti, Bangalore, IN;
International Business Machines Corporation, Armonk, NY (US);
Abstract
In a multiprocessor system, a method for dynamically establishing an I/O path between a processor node and an I/O device for routing data there between. The method starts with providing a configuration graph. The graph has objects associated with elements (devices) of the system and links connecting the objects. The node is identified, and links are then followed in the graph from an object associated with the I/O device to an object associated with a node. If multiple I/O paths exist and an optimal path is desired, the method includes providing in the links routing information containing nodes that can be directly reached via the link. Links are then followed, if possible, whose routing information contains the identified node. If no link having such routing information exists at an object along the path, then another link is chosen having routing information containing another node. This other link may be chosen in a round robin manner if there are multiple links to choose from. If multiple links having such routing information exist at an object along the path, then one of the links is chosen in a round robin manner. The method may also be used in uniprocessor systems such as a system with a one-processor node for simply establishing multiple paths to provide fault tolerance.