The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 13, 2002

Filed:

Sep. 15, 1999
Applicant:
Inventors:

Mark J. Dapper, Cincinnati, OH (US);

Michael J. Geile, Loveland, OH (US);

Terrance J. Hill, Fairfield, OH (US);

Harold A. Roberts, Eden Prairie, MN (US);

Brian D. Anderson, Plymouth, MN (US);

Jeffrey Brede, Eden Prairie, MN (US);

Mark S. Wadman, Eden Prairie, MN (US);

Robert J. Kirscht, Savage, MN (US);

James J. Herrmann, Eagan, MN (US);

Michael J. Fort, Eagan, MN (US);

Steven P. Buska, Minnetonka, MN (US);

Jeff Solum, Bloomington, MN (US);

Debra Lea Enfield, Chaska, MN (US);

Darrell Berg, Bloomington, MN (US);

Thomas Smigelski, Lake Zurich, IL (US);

Thomas C. Tucker, Chapel Hill, NC (US);

Joe Hall, Bloomington, MN (US);

John M. Logajan, Arden Hills, MN (US);

Somvay Boualouang, Bloomington, MN (US);

Heng Lou, Bloomington, MN (US);

Mark D. Elpers, Elk River, MN (US);

Matt Downs, Bloomington, MN (US);

Tammy Ferris, Bloomington, MN (US);

Adam Opoczynski, Plano, TX (US);

David S. Russell, Minneapolis, MN (US);

Calvin G. Nelson, Shorewood, MN (US);

Niranjan R. Samant, Middletown, CT (US);

Joseph F. Chiappetta, Trumbull, CT (US);

Scott Sarnikowski, San Jose, CA (US);

Assignee:

ADC Telecommunications, Inc., Eden Prairie, MN (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/714 ; G06F 7/38 ;
U.S. Cl.
CPC ...
G06F 1/714 ; G06F 7/38 ;
Abstract

A apparatus for providing a Fast Fourier Transform (FFT) and an inverse FFT is provided. The apparatus comprises a radix-N core. The radix-N core includes at least N multipliers. The radix-N core also includes a twiddle-factor lookup table that stores complex twiddle-factors. The twiddle-factor lookup table is coupled to one input of each of the multipliers. The radix-N core also includes a conversion random access memory (RAM) that stores transform points. The conversion RAM is coupled to another input of each of the multipliers. The radix-N core also includes an array of at least N-times-N adder-subtracter-accumulators.


Find Patent Forward Citations

Loading…