Non-volatile memory circuit

Abstract

The present invention provides a non-volatile memory circuit that can easily read and write. Especially, the present invention is effective to storage multi-value or analog value. The present invention has a storage transistor Nc with a floating gate and a feedback transistor Nf with a floating gate whose source are connected commonly and a load circuit is provided to the drain side of both transistors. A negative feedback circuit is provided between the drain of the storage transistor Nc and the floating gate of the feedback transistor Nf. An output transistor P is a preferable example of the negative feedback circuit, whose gate is connected to the drain of the storage transistor and which generates a voltage corresponding to that gate voltage at an output terminal. This output terminal and the floating gate of the feedback transistor are connected. A memory circuit of such a configuration operates so that the voltage corresponding to the charge in the floating gate of the storage transistor Nc and the output voltage of the output terminal OUT become the same. Therefore, the voltage of the floating gate of the storage transistor can be directly detected.