The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 06, 2002

Filed:

Jun. 23, 1998
Applicant:
Inventors:

Christophe Frey, Meylan, FR;

Stéphane Hanriat, Saint Vincent de Mercuze, FR;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G01R 3/128 ; G06F 1/100 ; G06K 5/04 ; G11B 5/00 ; G11B 2/020 ;
U.S. Cl.
CPC ...
G01R 3/128 ; G06F 1/100 ; G06K 5/04 ; G11B 5/00 ; G11B 2/020 ;
Abstract

The present invention relates to a method of functional testing of a logic circuit and to an integrated circuit for implementing the method. The method includes providing at least one test pattern and the storage of this test pattern in a first test register, this providing step being synchronized by an external clock signal; serially providing of this test pattern to an input of the internal logic circuit, this providing step being synchronized by a test clock signal generated from an internal clock signal; storing, in a second test register connected to the output of the internal logic circuit, at least one resulting pattern generated by the internal logic circuit when the test pattern is provided thereto, this storing being synchronized by the test clock signal; and providing to the outside, by series shifting, of the resulting pattern, this providing step being synchronized by the external clock signal.


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