The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 06, 2002

Filed:

Nov. 05, 1998
Applicant:
Inventors:

Deirdre O'Shea, San Diego, CA (US);

Ismail Lakkis, San Diego, CA (US);

Masood Tayebi, San Diego, CA (US);

Assignee:

Wireless Facilities, Inc., San Diego, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H04L 2/714 ;
U.S. Cl.
CPC ...
H04L 2/714 ;
Abstract

The present invention provides a system and method of timing estimation for use in a digital, receiver within a communication system. This method exploits the complementary information available from the use of two different nonlinearities to estimate the timing offset following asynchronous sampling of the received signal at a rate of two samples per symbol. The present method operates in a feedforward configuration thereby avoiding issues associated with feedback configurations such as hangup. The present method uses a magnitude square nonlinearity as well as a delay, complex conjugate and multiply nonlinearity to calculate the timing offset. The choice of these nonlinearities is influenced by the need for the estimator to operate in the presence of a phase offset on the received signal. Timing estimators which can tolerate the presence of a slowly varying phase offset over the observation interval on the received signal are especially important in all-digital feedforward receiver design. Separating the two sample per symbol outputs from the nonlinearities into odd and even samples provides four signals which, when suitably manipulated, yield an expression for the timing estimate. This timing offset is then fed to a timing correction unit which calculates the data samples corresponding to the sampling clock phase and removes the redundant samples. The resultant sampled signal is then forwarded to additional synchronization and functional units in the receiver. The system may be utilized in a variety of digital receivers employing CDMA, TDMA, FDMA and/or any combination of the principles of the above or other technologies.


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