The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 06, 2002

Filed:

Oct. 04, 1999
Applicant:
Inventors:

Earl E. Wentzel, Minneapolis, MN (US);

Brant R. Gourley, Eagan, MN (US);

Gregory A. King, Lakeville, MN (US);

Paul F. Cisewski, Brooklyn Park, MN (US);

Steven V. Stang, Inver Grove Heights, MN (US);

Gregory P. Micko, Cottage Grove, MN (US);

Brian J. Sandvold, Blaine, MN (US);

Assignee:

Agere Systems Guardian Corp., Orlando, FL (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H05K 7/20 ;
U.S. Cl.
CPC ...
H05K 7/20 ;
Abstract

A printed wiring board provides connection between a chip and a standard footprint layout of a test machine. An insulating substrate defines a chip receiving region having a plurality of chip connector pads on one side of the substrate for connection to bump contacts of custom integrated circuit chips. A plurality of layout connectors are in a layout connection region of the board and arranged in the standard footprint layout. Circuit traces provide electrical connection between the chip connectors and the layout connectors, and a solder stop on the substrate extends over the circuit traces between the chip receiving region and the layout connection region. A plurality of plated apertures extend through the substrate in the chip receiving region to a thermally conductive heat sink opposite the chip connectors. In use, a chip is mounted to the board in the chip receiving region and connected to the chip connectors to rigidly mount the chip to the board. A thermally conductive paste extends through the apertures to thermally connect the chip to the heat sink. The solder stop prevents solder connecting the chip to the chip connectors from wicking along the traces thereby preventing deformation of the bump contacts.


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