The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 06, 2002
Filed:
Nov. 06, 2001
Satoru Miyabe, Tokyo, JP;
Yasuhiro Sugimoto, Kanagawa-ken, JP;
Other;
Abstract
A differential comparison circuit capable of easily obtaining desired circuit accuracy and comparing differential signals with reduced influences of fluctuation of a power source voltage. Input/output terminals I/O and I/O of a latch circuit are connected to the drain terminals of MOS transistors M and M having the same characteristics. Input terminals IN and IN are provided to the gate and source terminals of the MOS transistor M and input terminals IN and IN are provided to the gate and source terminals of the MOS transistor M A bias circuit brings the MOS transistors M and M into the same bias state. The difference of the input signals supplied to the input terminals IN and IN is compared with the difference of the input signals supplied to the input terminals IN and IN Since the comparison result is outputted from the first and second input/output terminals I/O and I/O the input offset voltage does not affect the differential comparison circuit. Therefore, the differential comparison circuit can set the reference voltage to the differential signal and can easily obtain required accuracy.