Integrated circuit with metal programmable logic having enhanced reliability

Abstract

A method of manufacturing an integrated circuit having metal programmable logic cells. Metal programmable logic cells include transistors which, by varying routing of conductors in the metalization of the integrated circuit, may be connected in or disconnected from a logic path extending between the input and output of the cell. Transistors which are deselected by not being connected in the logic path are also decoupled from the supply rails. Generally speaking, deselected transistors can not be scan tested without substantial additional circuitry, as they do not form part of the logic path between the cell input and output to which the scan test circuitry is normally coupled. Decoupling transistors which are not in the logic path ensures that “stuck on” faults, in which transistors are stuck in a conductive state, do not allow current to flow between the supply rails through these faulty transistors, thus avoiding hot spots and reliability problems. By preventing damage even in the event of a “stuck on” fault, the need for extra test circuitry is avoided.