The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 23, 2002

Filed:

Dec. 15, 2000
Applicant:
Inventors:

Andreas Grundl, Munich, DE;

Bernhard Hoffmann, Starnberg, DE;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H02M 7/68 ; H02M 1/00 ;
U.S. Cl.
CPC ...
H02M 7/68 ; H02M 1/00 ;
Abstract

The invention relates to a half-bridge module which is arranged in an electrically insulating cooling liquid and in which two semiconductor switches form a half-bridge; the first semiconductor switch is capable of being connected by its source terminal to a high voltage potential, and the second semiconductor switch is capable of being connected by its drain terminal to a low voltage potential; the drain terminal of each first semiconductor switch is connected to the source terminal of the respective second semiconductor switch; whereby respective first semiconductor switches are arranged with their source terminal on a common first metallic conductor rail which is capable of being connected to the high voltage potential; respective second semiconductor switches are arranged with their source terminal on a second metallic conductor rail constituting the output which is arranged alongside the first conductor rail, spaced therefrom; each second semiconductor switch is connected by its drain terminal to a common third metallic conductor rail which is capable of being connected to the low voltage potential and is arranged alongside the first and second conductor rails, spaced therefrom; a capacitor arrangement having a backup capacitor which is connected to the first and third conductor rails and which overlaps the first and second semiconductor switches in such a manner that the semiconductor switches are spatially located between the corresponding conductor rails and the backup capacitor; a control input having a terminal for connection to the triggering device in the region of a first front side of the conductor rails, and the output having a terminal in the region of a second front side of the second conductor rail.


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