The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 23, 2002
Filed:
Aug. 17, 2000
Yong-Hong Chen, Miao-Li Hsien, TW;
AMIC Technology (Taiwan) Inc., Hsin-Chu Hsien, TW;
Abstract
A semiconductor wafer has a silicon substrate, at least one active area, a shallow trench isolation positioned on the silicon substrate surrounding the active area, and a first oxide layer positioned on the substrate surface within the active area. A first conductive layer is formed in a predetermined area within the active area, then the LDD of the MOS transistor is formed in the silicon substrate that is not covered by the first conductive layer. A second oxide layer, approximately flush with the top of the first conductive layer, is formed on the surface of the semiconductor wafer, and a second conductive layer is formed on the surface of the second oxide layer. Portions of the second conductive layer and the second oxide layer are removed to ensure that the residual second conductive layer and the first conductive layer form a T-shaped gate. Finally, the source and the drain of the MOS transistor are formed on the silicon substrate within the active area.