Cam cell circuit having decision circuit

Abstract

A CAM Cell circuit having a memory cell circuit to store data, a decision circuit to decide whether comparison data match stored data on said memory cell circuit or not, and an output circuit to output a decision result made by said decision circuit to a match line is disclosed. The CAM Cell circuit has an exclusive-OR circuit connecting in parallel a circuit having first and second transistors in series-connection. It also has a circuit having third and fourth transistors in series-connection. The CAM Cell circuit also has a pre-charging circuit having a circuit connecting in series fifth and sixth transistors with different polarity from that of the first to fourth transistors, wherein stored data on the memory cell circuit, and stored data with different polarity from that of the former data are applied to each gate of the second and fourth transistors, respectively, the fifth and sixth transistors simultaneously become on to pre-charge the exclusive-OR circuit to output a not-match signal to said match line by controlling the output circuit before the decision operation. Subsequently, comparison data and comparison data with different polarity from that of the former data are supplied to each gate of the first and third transistors, respectively, and the exclusive-OR circuit decides whether the stored data on the memory cell circuit match the comparison data to output a match or not-match signal to said match line by controlling said output circuit based on a decision result.