The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 16, 2002
Filed:
Jul. 12, 2000
Arul Balasubramaniyan, Round Lake, IL (US);
Motorola, Inc., Schaumburg, IL (US);
Abstract
A current-controlled FET resistor and a low supply, current-controlled FET Pi attenuator network are provided. The current-controlled FET resistor includes an FET having drain, source, and gate terminals, and a connection between the gate terminal and the drain terminal, wherein a resistance characteristic of the FET is proportional to an input current flowing into the drain terminal. The low supply, current-controlled FET Pi attenuator network includes a first current-controlled FET resistor connected between an input node and a ground node, a second current-controlled FET resistor connected between the input node and an output node, a third current-controlled FET resistor connected between the output node and the ground node, a DC return path connected in parallel between the output node and the ground node, a first DC blocking capacitor connected between a Pi attenuator network input and the input node, a second DC blocking capacitor connected between the input node and the first current-controlled FET resistor, and a third DC blocking capacitor connected between the output node and the third current-controlled FET resistor, wherein resistance characteristics of the current-controlled FET resistors vary in relation to input currents flowing into the drain terminals.