The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 16, 2002
Filed:
Jan. 05, 1999
Raffi N. Elmadjian, Arcadia, CA (US);
George L. Kerber, San Diego, CA (US);
TRW Inc., Redondo Beach, CA (US);
Abstract
A method for fabricating an integrated circuit which reduces steps in the integrated circuit comprising the steps of depositing a first conductive material layer over the first dielectric material layer and patterning the first conductive material layer to form a first conductive pattern. A second dielectric layer is then deposited over the first conductive pattern and the exposed portions of the first dielectric material layer. A planarizing material layer is applied over the second dielectric material layer and cured such that the planarizing material layer produces a substantially planar top surface. The planarizing material layer and portions of the second dielectric material layer are removed in a manner which maintains the substantially planar top surface until only a preselected amount of material remains over the first conductive pattern.