The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 6418075 B1

PDF
Full Text
Expired
Date of Patent:
Jul. 09, 2002

Filed:

Jan. 16, 2001
Applicant:
Inventors:

Hiroki Shimano, Tokyo, JP;

Kazutami Arimoto, Tokyo, JP;

Yasuhiro Ishizuka, Tokyo, JP;

Seizou Furubeppu, Tokyo, JP;

Hiroki Sugano, Tokyo, JP;

Assignee:

Other;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 5/14 ;
U.S. Cl.
CPC ...
G11C 5/14 ;
Abstract

A semiconductor integrated circuit in which a logic and a memory are merged, includes a voltage generation unit for generating two or more internal power supply voltages based on two or more external power supply voltages supplied from outside the voltage generation unit with different timings and for furnishing the plurality of internal power supply voltages to the memory. The voltage generation unit includes a standby unit with a small current-feed ability that is always activated, for generating the plurality of internal power supply voltages, and an active unit with a large current-feed ability that is activated as needed, for generating the plurality of internal power supply voltages. An activation control unit prevents the active unit from being activated until all of the plurality of external power supply voltages rise.


Find Patent Forward Citations

Loading…