The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 09, 2002

Filed:

Apr. 14, 2000
Applicant:
Inventor:

Mamoru Fujita, Tokyo, JP;

Assignee:

NEC Corporation, Tokyo, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C 7/00 ;
U.S. Cl.
CPC ...
G11C 7/00 ;
Abstract

A semiconductor memory device is provided that can shorten the precharge time and accelerate the access time of the memory without increasing the chip size. The sense amplifier selection circuit outputs a precharge control signal PDLD that carries out a specified precharge of bit lines BLT to BLTN and bit lines BLN to BLNn connected to sense amplifiers SA to SAn. A voltage transformer circuit transforms the voltage value at H level of the input precharge control signal PDLB to a voltage VDV having a value higher than the value “Vcc+Ct ”, which is the voltage power source Vcc added to the threshold value voltage Vt of the MOS transistors NM of the precharge drive circuits to , and outputting the result as the precharge drive voltage PDLD. The precharge drive circuits to are formed in the cross region, and formed by n-channel type MOS transistor NM and n-channel type MOS transistor NM


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