The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 09, 2002

Filed:

Jun. 19, 2001
Applicant:
Inventors:

Hiroshi Sato, Iruma, JP;

Satoshi Noda, Ome, JP;

Kiichi Manita, Kawagoe, JP;

Shoji Kubono, Ome, JP;

Koji Shigematsu, Fussa, JP;

Assignee:

Other;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 7/00 ; H03K 7/162 ;
U.S. Cl.
CPC ...
G11C 7/00 ; H03K 7/162 ;
Abstract

Disclosed is a semiconductor memory having an internal booster, such as a flash memory, in which a situation that the program cannot escape from a writing operation can be avoided, and the writing operation can be promptly finished according to the level of an external source voltage. This semiconductor memory having an internal booster has a voltage detecting circuit (limiter LM) for detecting whether a boosted voltage has reached a predetermined potential or not and a timer capable of counting predetermined time. A control circuit applies the boosted voltage to a selected memory cell when the voltage detecting circuit detects that the boosted voltage has reached the predetermined potential and, when it is detected on the basis of counting information of the timer that the predetermined time has elapsed since the booster started the boosting operation, the control circuit applies the boosted voltage to the selected memory cell even if the boosted voltage generated by the booster has not reached the predetermined potential yet.


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