Nonvolatile semiconductor memory device capable of correctly performing erasure/programming completion determination even in presence of defective bit

Abstract

In a data register latching a data on a selected memory cell of a memory array, circuitry is provided for repairing a defect when the defect is present in a latch circuit included in the data register. The defect repairing is implemented by reverse current flow prevention for a latch power supply, of a determination transistor into a non-conductive state, determination with a forcibly setting circuit, inversion of a latch data, switching of current detectors. A product yield is improved by repairing the defect even when the defect is present in a latch circuit section in which a data is latched.