The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 09, 2002
Filed:
Feb. 28, 2000
James S. McKee, Fort Lauderdale, FL (US);
Kevin J. Pieper, Coral Springs, FL (US);
Andrew J. Butterfield, Pembroke Pines, FL (US);
Other;
Abstract
An interconnect system for use with interposers or chip carriers provides highly efficient area utilization by attaching very small chip components ( ) such as resistors or capacitors to the solder pads ( ) on the underside of a carrier substrate ( ) such that only one end ( ) of the chip component is attached to the solder pad, while the other end ( ) is suspended free in space. When the interposer or chip carrier is soldered to a main printed circuit board, the free end of the chip component is soldered to a corresponding pad on the printed circuit board. The vertically mounted chip components provide an electrical function, such as decoupling, and also provide an electrical interconnection between the interposer and the printed circuit board. The interposer has electrical vias that pass vertically through the substrate from the solder pads to a conductive circuitry pattern on the top side, which also contains an integrated circuit die or an array of larger discrete chip components. Solder spheres ( ) may also be used on some of the solder pads.