The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 09, 2002
Filed:
Sep. 20, 2000
Applicant:
Inventor:
Kazuaki Isobe, Yokohama, JP;
Assignee:
Kabushiki Kaisha Toshiba, Kawasaki, JP;
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 2/1336 ;
U.S. Cl.
CPC ...
H01L 2/1336 ;
Abstract
A cell array region and a peripheral transistor region are provided. In the cell array region, a plurality of memory cell transistors are formed, and element regions of the memory cell transistors are isolated by an embedded isolation region. In the peripheral transistor region, a plurality of peripheral circuit transistors are formed, and element regions of the peripheral circuit transistors are isolated by an embedded isolation region. Isolation end portions of the gate electrode of each peripheral circuit transistor do not fall in grooves of the embedded isolation region but is positioned to be horizontal to the center part of the gate electrode.