The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 09, 2002

Filed:

Oct. 19, 1999
Applicant:
Inventors:

Kin-Sang Lam, Austin, TX (US);

Sey-Ping Sun, Austin, TX (US);

Assignee:

Advanced Micro Devices, Inc., Austin, TX (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G01R 3/126 ; H01L 2/166 ;
U.S. Cl.
CPC ...
G01R 3/126 ; H01L 2/166 ;
Abstract

A processing line includes a processing tool and an automatic process controller. The processing tool is adapted to deposit a layer of material on a semiconductor wafer based on an operating recipe. The automatic process controller is adapted to identify a post-idle set of wafers to be processed in the processing tool after an idle period, determine deposition times for wafers in the set of post-idle wafers, and modify the operating recipe of the processing tool for each of the wafers in the post-idle set based on the deposition times. A method for reducing wafer to wafer deposition variation includes designating a set of post-idle wafers; determining a deposition time for each of the wafers in the post-idle set, at least two of the deposition times being different; and depositing a layer on the wafers in the post-idle set based on the deposition times determined.


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