The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 09, 2002
Filed:
Apr. 02, 2001
Laszlo Fabry, Burghausen, DE;
Gabriele Lechner, Marktl, DE;
Anton Schnegg, Burghausen, DE;
Andreas Ehlert, Mehring, DE;
Other;
Abstract
A process is for producing a semiconductor wafer with a front surface and a back surface, in which the semiconductor wafer is subjected to two-sided polishing. The process includes the following: (a) producing a hydrophobic surface on the semiconductor wafer by treating the semiconductor wafer with an aqueous HF solution; (b) simultaneous polishing of the front surface and the back surface of the semiconductor wafer with a surface which has been rendered hydrophobic, with an alkaline polishing abrasive being continuously supplied between two rotating upper and lower polishing plates, which are both covered with a polishing cloth, the pH of the polishing abrasive being from pH 8.5 to pH 12.5; (c) after an intended polishing abrasion has been reached, supplying a stopping agent to the semiconductor wafer; and (d) removing the semiconductor wafer from the polishing plates. There is also a carrier for the double-side polishing of at least one semiconductor wafer, having a cutout for holding the semiconductor wafer which is lined with a shaped part made from plastic. The shaped part is constructed in such a manner that it divides a free space between an edge of the semiconductor wafer and the carrier into a plurality of separate empty spaces.