The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 02, 2002
Filed:
Jun. 02, 1999
Alcatel Canada Inc., Kanata, CA;
Abstract
A method and apparatus for load distribution across memory banks with constrained access is accomplished using a bank balancer that ensures that data to be buffered is evenly distributed throughout the various banks of the memory structure. The bank balancer maintains bank depth information relating to each of the banks. The bank balancer receives dequeue and enqueue information, where the dequeue information specifies read operations that will remove data from the various banks, and the enqueue information indicates that there is data to be written to the memory banks. The dequeue information constrains which banks may be utilized to enqueue received data. In order to determine to which banks to enqueue data, the bank balancer sorts the banks by their depth. The bank balancer then eliminates those banks which cannot be used for enqueue operations due to either the dequeue operations or other enqueue operations that have already been determined. Once a sorted list of eligible banks for enqueuing has been established, the bank balancer selects the bank storing the least amount of data which is eligible. The depth information for each bank is updated based on the enqueue and dequeue operations, and the bank balancer re-sorts the banks such that the changes in depth are taken into account in the following cell period.