The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 02, 2002
Filed:
Feb. 25, 2000
Carl A. Schu, Plymouth, MN (US);
Daniel R. Greeninger, Coon Rapids, MN (US);
David L. Thompson, Fridley, MN (US);
Medtronic, Inc., Minneapolis, MN (US);
Abstract
Improved operating system architecture for an implantable medical device incorporating adiabatic clock-powered logic alone or in conjunction with conventional clocked logic or self-timed logic for reducing power consumption and increasing and improving processing capabilities is disclosed. The adiabatic clock-powered logic is employed to implement digital signal processors (DSPs) including analog to digital (ADC) signal converters, a state machine or the components of microprocessor cores, e.g., the CPU, arithmetic logic units (ALU), on-chip RAM and ROM and data and control buses, and other logic units, e.g., additional RAM and ROM, a direct memory address (DMA) controller, a block mover/reader, a cyclic redundancy code (CRC) calculator, and certain uplink and downlink telemetry signal processing stages. The adiabatic clocked CMOS logic is incorporated into the same IC or ICs with clocked CMOS logic and provides manufacturing economies.