The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 02, 2002

Filed:

Dec. 22, 2000
Applicant:
Inventor:

Toshimasa Usui, Chino, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03L 7/06 ;
U.S. Cl.
CPC ...
H03L 7/06 ;
Abstract

A clock generation circuit that generates multi-phase output clock signals which immediately follow any change in the period of an input clock signal. This clock generation circuit comprises a voltage-controlled oscillator ( ) that generates an output signal having a frequency that varies in response to a control voltage; a phase comparator ( ) that compares the phase of the input clock signal and the phase of the output signal of the voltage-controlled oscillator, to detect the phase difference therebetween; control voltage generation circuits ( ) that generate a control voltage corresponding to that phase difference; and a variable delay circuit ( ) that generates multi-phase output clock signals by delaying the input clock signal in accordance with the control voltage.


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