The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 25, 2002

Filed:

Jul. 28, 1999
Applicant:
Inventor:

Toshihiko Matsumoto, Tokyo, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G01R 3/128 ;
U.S. Cl.
CPC ...
G01R 3/128 ;
Abstract

A pattern data transfer circuit capable of decreasing the number of transfer of pattern data and of shortening the entire transfer time as a whole. A chip selector circuit generates pin group data representing tester channels contained in respective pin groups on the basis of pin groups such as “ADDRESS” and adapter board data corresponding to the tester channels, and it validates only a chip select signal corresponding to the tester channel shown by the pin group data in the case of transfer of “I/O” data and “Strobe Mask” data, and also validated either chip selector signal CS corresponding to the tester channel in the case of transfer of “HiLo” data. A CPU extracts respective patterns of the selected pin group from pattern data and transfers the extracted patterns to all the pattern memories. As a result, “HiLo” data is sequentially transferred to the pattern memories for every tester channel, and data other than “HiLo” data are parallelly transferred to all tester channels shown by pin the group data.


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