The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 25, 2002

Filed:

Dec. 13, 1999
Applicant:
Inventors:

Rajendran Nair, Hillsboro, OR (US);

Gregory E. Dermer, Portland, OR (US);

Stephen R. Mooney, Beaverton, OR (US);

Nitin Y. Borkar, Beaverton, OR (US);

Assignee:

Inter Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 1/04 ; H03K 3/00 ;
U.S. Cl.
CPC ...
G06F 1/04 ; H03K 3/00 ;
Abstract

A low jitter external clocking system and method are disclosed. According to one embodiment of the present invention, a differential clock signal is received on a first clock signal line and a second clock signal line. A differential amplifier coupled to the first clock signal line and the second clock signal line amplifies the differential clock signal into a single-ended output clock signal.


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