The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 18, 2002
Filed:
Aug. 12, 1999
Brian L. Brown, Sugar Land, TX (US);
Jackson Leung, Sugar Land, TX (US);
Ronald J. Syzdek, Sugar Land, TX (US);
Pow Cheah Chang, Singapore, SG;
Texas Instruments Incorporated, Dallas, TX (US);
Abstract
A semiconductor memory device ( ) having a parallel test circuit is disclosed. A test data path receives parallel I/O line (I/O -I/O ) values, and generates therefrom test result data values (PASS and DATA_TST). The test result data values (PASS and DATA_TST) are coupled to a two-bit register ( ) and output in a sequential fashion to an open drain output driver ( ). In this manner, test result data values are provided by driving an output (DQ) in a rapid sequential fashion, rather than placing the output at one of three states (such as logic high state, a logic low state, or a high impedance state).